Field of the Invention:
The invention relates to a circuit for generating two closely adjacent frequencies, having two oscillators each generating one of the two frequencies, and a PLL circuit for regulating the frequencies, the PLL circuit performing a frequency comparison of at least one of the two frequencies with a reference frequency and regulating the frequencies of the two oscillators as a function of a frequency comparison output signal of the PLL circuit.
Closely adjacent frequencies, in other words frequencies which are located close to one another, are used, for example, in data scanning, in zero passage determination of data signals, or in retrieval of timing signals. An example of a value for such a frequency is a first clock frequency of 160.0 MHz and a second clock frequency that is higher by 0.1 to 0.8%.
Such frequencies have thus far been generated by using two PLL circuits (phase lock loop circuits) having two highly stable quartz oscillators for generating two reference frequencies for the regulation of two oscillators that generate the desired closely adjacent frequencies. If a circuit of this kind is to be used as part of a very large scale integrated circuit, then such a structure is unsuitable, because of the number of external components required as well as because of the space it occupies and the current it consumes.